Optimizing BLE Power Consumption for Battery-Powered Devices

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Maximizing battery life in BLE IoT products

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BLE Power Optimization

Power optimization is the engineering discipline that separates a BLE product lasting two years on a CR2032 from one that drains in six weeks. The physics are unforgiving: a CR2032 holds approximately 235 mAh; a BLE radio transmitting at 0 dBm draws 5–15 mA. Even at 10 ms per second of radio-on time, you deplete the battery in months. The goal is to minimize radio-on time, maximize sleep depth, and eliminate every milliampere of quiescent current.

Use the BLE Power Estimator to model your specific duty cycle before committing to a chip or topology.

Sleep Modes and Wake Sources

Modern BLE SoCs offer a hierarchy of sleep states. Each deeper state saves more power at the cost of longer wake latency and fewer wake sources.

Sleep Mode Typical Current Wake Latency RAM Retention Use Case
Active (CPU running) 5–20 mA Yes Processing, radio TX/RX
CPU sleep (WFI) 1–5 mA < 1 µs Yes Waiting for interrupt
Low-power idle 0.5–2 mA < 10 µs Yes Between connection events
System OFF (deep sleep) 0.3–2 µA 100–500 ms No Multi-minute sleep periods
System OFF + RAM off < 0.5 µA 100–500 ms No Maximum battery life

Critical rules for sleep mode efficiency:

  • Disable all unused peripherals: UART, SPI, I2C peripherals draw 50–200 µA when clocked even with no data. Disable at the peripheral register level before sleep.
  • Use retention RAM carefully: Keeping 256 kB of RAM powered during sleep can cost 5–10 µA; keep only the minimal state required and reconstruct from flash on wake.
  • 32 kHz LFXO vs LFRC: An external 32.768 kHz crystal (LFXO) consumes ~1 µA but provides 20 ppm accuracy, enabling tight connection interval scheduling. The internal RC oscillator (LFRC) is free but drifts ±500 ppm, widening the connection event guard time and wasting radio-on time.

Advertising Interval Optimization

In advertising mode, the advertising interval is the dominant power knob. Shorter intervals improve discoverability and latency to connection, but cost proportionally more energy.

Advertising Interval Discoverability Current (avg) CR2032 Life (radio only)
20 ms Excellent ~3.5 mA ~67 hours
100 ms Good ~0.7 mA ~14 days
500 ms Adequate ~140 µA ~70 days
1000 ms Slow (UX impact) ~70 µA ~140 days
10 000 ms Background only ~7 µA ~3.8 years

Best practice: Advertise at 100–200 ms for the first 30 seconds after power-on or button press (user is actively pairing), then reduce to 1000–2000 ms for background advertising. This fast-slow pattern recovers 80% of the energy cost of fast advertising over a typical product lifetime.

Extended advertising on BLE 5.0+ adds a secondary advertising channel with longer PDUs. For beacon applications, periodic advertising lets scanners synchronize to a schedule, enabling passive scanning without connection overhead.

Connection Parameter Tuning

Once connected, power is determined by three ATT">GATT/LL parameters: connection interval, slave latency, and supervision timeout.

Parameter Range Power Impact
Connection interval 7.5 ms – 4 s Dominant: longer = lower power
Slave latency 0 – 499 intervals Peripheral may skip N intervals when no data
Supervision timeout 100 ms – 32 s Trade: longer = more reconnection time

Recommended settings by application type:

Application Conn Interval Slave Latency Effective Wake Rate
HID keyboard/mouse 7.5–20 ms 0 Full — latency-critical
Heart rate monitor 200 ms 0 5 Hz
Environmental sensor 1000 ms 4 0.2 Hz (wake every 5 s)
Over-the-air update 15 ms 0 67 Hz — maximize throughput
Background sync 4000 ms 0 0.25 Hz

Slave latency is the most misused parameter. Setting slave latency = 4 on a 1000 ms connection interval means the peripheral wakes only once every 5 seconds to check for pending data from the central — saving 80% of the connection-interval energy. The peripheral still wakes every interval if it has data to send.

DC-DC Converter vs LDO Regulator

The power supply architecture is independent of BLE parameters but can reduce total system current by 20–40%.

A DC-DC converter (buck regulator) steps the battery voltage down to the SoC core voltage (1.8 V or 1.0 V) with 80–90% efficiency. A linear LDO drops the excess voltage as heat, achieving only (V_out / V_in) × 100% efficiency — typically 55–70% for a 3 V battery driving a 1.8 V SoC.

Supply Type Efficiency Noise Quiescent Current
LDO 55–70% Low 1–10 µA
DC-DC (PFM mode) 80–92% Moderate (switching) 0.3–2 µA
DC-DC (PWM mode) 85–93% Higher 100–500 µA

Most modern BLE SoCs (nRF52840, EFR32BG22, ESP32-C3) integrate a DC-DC converter. Enable it in your firmware initialization sequence — it is often disabled by default in early SDK examples.

Key trade-off: DC-DC converters produce switching noise at 1–4 MHz harmonics. Route the inductor and decoupling capacitors tightly per the datasheet layout rules, and avoid running antenna traces near the DCDC inductor. The RF performance benefit of saving 20 mA outweighs the noise penalty when layout rules are followed.

For a complete power budget combining sleep modes, advertising intervals, connection events, and DC-DC efficiency, use the BLE Power Estimator. Input your sensor sampling rate and expected connected vs advertising time split to get an estimated daily mAh consumption and projected battery life.

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